general description the ds1080l is a low-jitter, crystal-based clock gener- ator with an integrated phase-locked loop (pll) to gen- erate spread-spectrum clock outputs from 16mhz to 134mhz. the device is pin-programmable to select the clock multiplier rate as well as the dither magnitude. the ds1080l has a spread-spectrum disable mode and a power-down mode to conserve power. applications automotive cable modems cell phones computer peripherals copiers infotainment pcs printers features ? generates spread-spectrum clocks from 16mhz to 134mhz ? selectable clock multiplier rates of 1x, 2x, and 4x ? center spread-spectrum dithering ? selectable spread-spectrum modulation magnitudes of ?.5%, ?.0%, and ?.5% ? spread-spectrum disable mode ? low cycle-to-cycle jitter ? power-down mode with high-impedance output ? low cost ? low power consumption ? 3.0v to 3.6v single-supply operation ? -40? to +125? temperature operation ? small 8-lead sop package ds1080l spread-spectrum crystal multiplier sso pdn smsel 1 + 2 8 7 x2 v cc gnd cmsel x1 sop top view 3 4 6 5 ds1080l pin configuration 19-4997; rev 2; 10/09 + denotes a lead(pb)-free/rohs-compliant package. ordering information part temp range pin-package DS1080LU+ -40c to +125c 8 sop ________________________________________________________________ maxim integrated products 1 for pricing, delivery, and ordering information, please contact maxim direct at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
ds1080l spread-spectrum crystal multiplier 2 _______________________________________________________________________________________ absolute maximum ratings recommended operating conditions (t a = -40c to +125c) stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. voltage on v cc relative to gnd .........................-0.5v to +3.63v voltage on any lead relative to gnd ...............-0.5v to (v cc + 0.5v), not to exceed +3.63v operating temperature range .........................-40c to +125c storage temperature range .............................-55c to +125c soldering temperature...................see j-std-020 specification parameter symbol conditions min typ max units supply voltage v cc (note 1) 3.0 3.6 v input logic 1 v ih 0.8 x v cc v cc + 0.3 v input logic 0 v il gnd - 0.3 0.2 x v cc v input logic float i if 0v < v in < v cc (note 2) 1 a input leakage i il 0v < v in < v cc (note 3) 80 a sso < 67mhz 15 67mhz sso < 101mhz 10 sso load c sso 101mhz sso < 134mhz 7 pf crystal or clock input frequency f in 16.0 33.4 mhz crystal esr x esr 90 clock input duty cycle f indc 40 60 % crystal parallel load capacitance c l (note 4) 18 pf dc electrical characteristics (v cc = +3.0v to +3.6v, t a = -40c to +125c.) parameter symbol conditions min typ max units supply current i cc1 c sso = 15pf, sso = 16mhz 13 ma power-down current i ccq pdn = gnd, all input pins floating 200 a output leakage (sso) i oz pdn = gnd -1 +1 a low-level output voltage (sso) v ol i ol = 4ma 0.4 v high-level output voltage (sso) v oh i oh = -4ma 2.4 v input capacitance (x1/x2) c in (note 5) 5 pf
ds1080l spread-spectrum crystal multiplier _______________________________________________________________________________________ 3 ac electrical characteristics (v cc = +3.0 to +3.6v, t a = -40c to +125c.) parameter symbol conditions min typ max units sso duty cycle ssodc measured at v cc /2 40 60 % rise time t r (note 6) 1.6 ns fall time t f (note 6) 1.6 ns peak cycle-to-cycle jitter t j f sso = 16mhz, t a = -40 to +85c, 10,000 cycles (note 5) 75 ps 16mhz 20 power-up time t por pdn pin (note 7) 33.4mhz 11 ms power-down time t pdn pdn pin (notes 8 and 9) 100 ns dither rate f dither f in / 1024 note 1: all voltages referenced to ground. note 2: maximum source/sink current applied to input to be considered a float. note 3: applicable to pins cmsel, smsel, and pdn . note 4: see information about c l1 and c l2 in the applications information section at the end of the data sheet. note 5: not production tested. note 6: for 7pf load. note 7: time between pdn deasserted to output active. note 8: time between pdn asserted to output high impedance. note 9: guaranteed by design.
ds1080l spread-spectrum crystal multiplier typical operating characteristics (v cc = 3.3v, t a = +25c, unless otherwise noted.) supply current vs. supply voltage ds1080l toc01 supply voltage (v) supply current (ma) 3.35 3.45 3.55 3.65 3.25 3.05 3.15 2 4 6 8 10 12 0 2.95 at 16mhz cmsel = 4x at 16mhz cmsel = 2x at 16mhz cmsel = 1x at 16mhz supply current vs. temperature ds1080l toc02 temperature ( c) supply current (ma) 110 10 60 2 4 6 8 10 12 0 -40 at 16mhz cmsel = 2x at 16mhz cmsel = 4x at 16mhz cmsel = 1x at 16mhz supply current vs. frequency ds1080l toc03 frequency (mhz) supply current (ma) 31 21 26 2 4 6 8 12 10 16 14 0 16 at 16mhz cmsel = 2x at 16mhz cmsel = 4x at 16mhz cmsel = 1x at 16mhz pdn supply current vs. temperature ds1080l toc04 temperature ( c) pdn supply current (ma) 110 10 60 0.05 0.10 0.15 0.20 0.25 0 -40 at 16mhz cmsel = 1x at 16mhz cmsel = 4x at 16mhz cmsel = 2x at 16mhz duty cycle vs. temperature ds1080l toc05 temperature ( c) duty cycle (%) 110 10 60 44 42 48 52 56 46 50 54 58 60 40 -40 at 16mhz duty cycle vs. supply voltage ds1080l toc06 supply voltage (v) duty cycle (%) 3.55 3.65 3.15 3.35 3.45 3.05 3.25 44 42 48 52 56 46 50 54 58 60 40 2.95 at 16mhz output during power-up and power-down ds1080l toc07 sso and pdn time ( s) power- down t pdn t por power- up 4 _______________________________________________________________________________________
ds1080l spread-spectrum crystal multiplier crystal oscillator 1x/2x/4x clock multiplying pll with spread spectrum configuration decode and control v cc v cc gnd note: see information about c l1 and c l2 in the applications information section at the end of the data sheet. pdn sso cmsel smsel x1 x2 16mhz to 33.4mhz f sso = 16mhz to 134mhz c l1 c l2 f in f sso ds1080l block diagram pin description pin name function 1 x1 crystal drive/clock input. a crystal with the proper loading capacitors is connected across x1 and x2. instead of a crystal, a clock can be applied at the x1 input. 2 gnd signal ground 3 cmsel clock multiplier select. tri-level digital input. 0 = 1x float = 2x 1 = 4x 4 smsel spread-spectrum magnitude select. tri-level digital input. 0 = 0.5% float = 1.0% 1 = 1.5% 5 pdn power-down/spread-spectrum disable. tri-level digital input. 0 = power-down/sso three-stated float = power-up/spread spectrum disabled 1 = power-up/spread spectrum enabled 6 sso spread-spectrum clock multiplier output. outputs a 1x, 2x, or 4x spread-spectrum version of the crystal or clock applied at the x1/x2 pins. 7 v cc supply voltage 8 x2 crystal drive output. a crystal with the proper loading capacitors is connected across x1 and x2. if a clock is connected to x1, then x2 should be left open circuit. _______________________________________________________________________________________ 5
ds1080l spread-spectrum crystal multiplier 6 _______________________________________________________________________________________ detailed description the ds1080l is a crystal multiplier with center spread- spectrum capability. a 16mhz to 33.4mhz crystal is connected to the x1 and x2 pins. alternately, a 16mhz to 33.4mhz clock can be applied to x1 in place of the crystal. in such applications, x2 would be left open cir- cuit. using the cmsel input, the user selects whether the attached crystal or input clock is multiplied by 1, 2, or 4. the ds1080l is capable of generating spread- spectrum clocks from 16mhz to 134mhz. the pll can dither the output clock about its center fre- quency at a user-selectable magnitude. using the smsel input, the user selects the dither magnitude. the pdn input can be used to place the device into a low-power standby mode where the sso output is tri- stated. if the pdn pin is floated, the sso output is active but the spread-spectrum dithering is disabled. the spread-spectrum dither rate is fixed at f in / 1024 to keep the dither rate above the audio frequency range. on power-up, the output clock (sso) remains three- stated until the pll reaches a stable frequency (f sso ) and dither (f dither ). applications information crystal selection the ds1080l requires a parallel resonating crystal operating in the fundamental mode, with an esr of less than 90 . the crystal should be placed very close to the device to minimize excessive loading due to para- sitic capacitances. oscillator input when driving the ds1080l using an external oscillator clock, consider the input (x1) to be high impedance. crystal capacitor selection the load capacitors c l1 and c l2 are selected based on the crystal specifications (from the data sheet of the crystal used). the crystal parallel load capacitance is calculated as follows: for the ds1080l use c l1 = c l2 = c lx . in this case, the equation then reduces to: where c l1 = c l2 = c lx. equation 2 is used to calculate the values of c l1 and c l2 based on values on c l and c in noted in the data sheet electrical specifications. power-supply decoupling to achieve best results, it is highly recommended that a decoupling capacitor is used on the ic power-supply pins. typical values of decoupling capacitors are 0.001f and 0.1f. use a high-quality, ceramic, sur- face-mount capacitor, and mount it as close as possi- ble to the v cc and gnd pins of the ic to minimize lead inductance. c c c l lx in equati =+ 2 o on 2 c cxc cc c l ll ll in = + + 12 12 equation1 +1.5% +1.0% +0.5% -0.5% f 0 -1.0% -1.5% dither cycle rate = f dither = f in /1024 f sso t figure 1. spread-spectrum frequency modulation
ds1080l spread-spectrum crystal multiplier _______________________________________________________________________________________ 7 layout considerations as noted earlier, the crystal should be placed very close to the device to minimize excessive loading due to parasitic capacitances. care should also be taken to minimize loading on pins that could be floated as a pro- gramming option (smsel and cmsel). coupling on inputs due to clocks should be minimized. chip information transistor count: 3951 substrate connected to ground package information for the latest package outline information and land patterns, go to www.maxim-ic.com/packages . note that a +, #, or - in the package code indicates rohs status only. package drawings may show a different suffix character, but the drawing pertains to the package regardless of rohs status. x2 note: in the above configuration with pdn connected to v cc , smsel connected to gnd and cmsel floating, the device is in normal operation with 2x clock multiplication, and spread-spectrum magnitude of 0.5%. f sso v cc v cc v cc sso pdn x1 crystal c l1 c l2 decoupling capacitor gnd cmsel smsel 8 7 6 5 1 2 3 4 ds1080l typical operating circuit package type package code document no. 8 sop u8+1 21-0036
ds1080l spread-spectrum crystal multiplier maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 8 _____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ? 2009 maxim integrated products maxim is a registered trademark of maxim integrated products, inc. revision history revision number revision date description pages changed 0 11/05 initial release. 1 3/06 changed v ihmin from 0.7v x v cc to 0.08v x v cc and v ilmax from 0.3 x v cc to 0.2v x v cc in the recommended operating conditions table. 2 2 10/09 changed the part number in the ordering information table. 1
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